Call for Papers for CASES 2025

CASES 2025, part of Embedded Systems Week, will be held as an in-person event from September 28 to October 3, 2025 in Taipei, Taiwan.

About the Conference

CASES is a premier forum for researchers, developers, and practitioners to exchange information on the latest advances in design, optimization, validation, and applications of embedded systems, Internet of Things (IoT), and the emergent trend of integrating Artificial Intelligence into IoT (AIoT). The conference will feature cutting-edge research in hardware-software co-design and co-validation, edge AI, embedded architecture, compilers for heterogeneous systems, memory/storage technology, security/reliability, energy-efficiency of embedded systems, and domain-specific hardware accelerators.

CASES 2025 solicits the submission of original research articles for full-length research papers that will be published in the ACM Transactions on Embedded Computing Systems.

Topics of Interest

CASES solicits submissions on the following topics divided into five technical tracks:

• Track 1: AI Systems and Applications of AI at Edge

  • Artificial Intelligence of Things (IoT), Edge intelligence
  • Architectures, accelerators, and compilers for artificial intelligence hardware
  • Applications of machine learning algorithms and techniques to embedded systems, IoT, and Cyber-Physical Systems (CPS)
  • Neuromorphic and cognitive computing, analytics for embedded applications
  • validation techniques for AI components.

• Track 2: Embedded Systems and IoT/CPS Security, Safety, Reliability, and Energy-Efficiency

  • Secure architectures, hardware security, software security for embedded systems, IoT, and CPS
  • Architecture, design, and compiler techniques for energy efficiency, reliability, and aging
  • Modeling, analysis, and optimization for timing and predictability
  • Validation, verification, testing, and debugging of embedded software.

• Track 3: Memory and Storage

  • Memory system architecture
  • Persistent memory, Emerging memory technologies (e.g., ReRAM, MRAM, FeRAM, DNA)
  • Caches, scratchpad memory, and compiler-controlled memory
  • Reconfigurable memory; Processing-in-memory; and storage systems.

• Track 4: Accelerators, Emerging Technologies, and Applications

  • Synthesis, optimization, and design-space exploration of high-performance, low-power accelerators
  • Domain-specific accelerators; Compilers for accelerators
  • Biologically-inspired computing; Heterogeneous and domain-specific multi-core SoC
  • Approximate computing; Flexible, stretchable, and flexible hybrid electronics (FHE); Augmented/virtual reality.

• Track 5: Architectures, Compilers, System-level Design

  • Embedded and mobile processor micro-architecture, Multi- and many-core processors, GPU architectures, Reconfigurable computing including FPGAs and CGRAs for embedded systems and IoT/CPS, Application-Specific processor design, 3D-stacked architectures
  • Networks-on-Chip (NoC) architectures; on-chip communication
  • I/O management in embedded systems; and compiler support for CPU, GPU, reconfigurable computing, compilation for memory, storage, and on-chip communications.

Important Dates

• Journal Track: Abstract Submission: March 23, 2025 (AoE)
• Journal Track: Full Paper Submission: March 30, 2025 (AoE, firm)
• Journal track: First Round Notification: May 18, 2025
• Late Breaking Tracks: Paper Submission: June 01, 2025 (AoE, firm)
• Journal track: Revised paper submission: June 15, 2025 (AoE, firm)
• Journal Track, Late Breaking Track: Notification: July 13, 2025
• All tracks (full paper, LB, Special Session): Camera ready: August 11, 2025
• Submission deadline for the Embedded System Software Competition (ESSC): TBD

Submission

Submit an Article to CASES 2025 at: https://cases25.hotcrp.com/

Author Information

For page length and formatting details, please refer to the author information page.

Program Chairs

• Jeronimo Castrillon (CASES TPC Chair, TU Dresden, DE)
• Christophe Dubach (CASES TPC Co-Chair, McGill University, CA)